Optimization algorithms for ultra-constrained applications and lightweight cryptography circuits

Digital circuits in the era of ubiquitous computing face challenges in the form of hardware and power constraints. This thesis proposes novel approaches to logic optimization which aim to reduce circuit area and power requirements, thereby enabling economical circuits for complex computations. In parallel, this thesis also proposes efficient architectures for popular lightweight cryptography primitives to provide hardware security in constrained applications. Collectively, this research contributes to the design and security of edge devices as part of a larger network such as the Internet of Things or similar paradigms.